HDL Works HDL Companion v2.10.R1 x64

HDL Companion is the HDL designer's Swiss army knife. It will help you to get and keep a good overview of any HDL design, including third party IP, legacy code and other HDL sources. Complete design directories and design files are dragged into HDL Companion and a complete design overview is created in seconds, uncovering information regarding numerous aspects of the design. The GUI offers many ways to navigate through the design and explore the details you're looking for.
The embedded fuzzy parsers accept any Verilog, VHDL or mixed HDL design code; even if the code is incomplete or contains errors. Syntactically correct HDL can also be linted to find problems not reported by the compilers.
HDL Companion has a unique setup of three main windows and a console window, which together offer a complete overview of your design, from high level structure to the details in the source code. The excellent navigation capabilities, including signal tracing, offer you an easy way to find an object and show its details.
The Console Window shows all syntax errors and warnings, which can easily be located in the HDL source using hot links from the Console Window to the Scriptum Window. The Console Window also functions as a Tcl interpreter, where any Tcl script or shell command can be executed.

Explore HDL Companion Features
- Global Views
HDL Companion creates a File View, an Object View and a Top Level View from the files it finds in your project.

- Detailed View
Each object in the Global View can be examined in detail in the Detailed View. For each possible object (entity, architecture, configuration, packages and module) HDL Companion generates a logical ordered list of the contents grouped in sections. The section allows you to focus on the details you are looking for.

- Hierarchical view : You can create an hierarchical overview for each entity/module in your project. The hierarchy can be displayed in 2 modes. One is the Tree view mode, also used in the other views. The other is the Rake mode, which resembles the traditional top-down view.

- Signal tracing:
You can follow a port or signal through the hierarchy and see where it is used in the Trace View. In the example at the right you see the port clk_i from the module usbf_top being traced down. The references denote where the signal is used in the HDL code.

- Search and Replace:
You can search through projects by using the Object Search or the Text Search. Both search engines display the results in the Console Window. The Object Search works on the internal HDL database of compiled objects. The Text Search and Replace works on the files in your projects. It allows you to perform a project wide search and replace, through all files belonging to your project. This makes it much easier to perform global name changes in your project.

- Linting your design:
The Lint tool analyzes your VHDL or Verilog code and reports potential problems which are not found by the compilers. It offers you a simple but fast method to improve the quality of the HDL code. It is intended to find all kinds of language constructs that are formally correct but probably not intended. Examples are signals that are defined but never used; signals that are on the sensitivity list of a process but not used inside the process; etc. You can run the Lint tool on the whole project or on packages, entities or modules separately. The results are displayed in the Lint tab of the Console Window. You can double click on a message to directly navigate to the source file and inspect the HDL code.

- HTML generation: VHDL and Verilog to HTML documentation generation
HDL Companion comes with an integrated HTML generator that allows you to export your project in a format that is easily accessible to others. VHDL and Verilog files will be translated to HTML including hyperlinks that allow easy navigation from identifiers to their definition. To make the code more readable color coding is used to highlight the VHDL and Verilog keywords.

- IP Integration
To ease the use of IP (developed internally or supplied by your (FPGA) vendor) a methodology has been developed to link this IP smoothly with your design files. A configuration dialog allows you to specify vendor installation directories (like Actel, Altera and Xilinx) to add their IP parts to the knowledge base of HDL Companion. Company IP can also be specified in a similar way. Use of this IP is controlled on a per project basis.


- HDL Companion: Scriptum Editor
The Scriptum Window offers a language sensitive text editor with a multiple document interface. This built-in editor supports:
- Language support for VHDL, Verilog, Java, SystemC, Tcl, EDIF, Perl
- Syntax coloring
- Column editing
- Language templates
- Identifier expansion
- In- and outdenting
- In- and outcommenting
- Line numbering
- Marker system for fast navigation

- EDA Tools Configuration
The support for other EDA tools has been split in two parts. The philosophy behind this approach is that you define your available tools (and different versions of them) once; and select which versions to use per project. This also allows you to easily switch between vendor and tool versions during your project. Second advantage is that HDL Companion will add these tools to your program path and set the required environment variables. The EDA Tools Selection wizard allows you to select the appropriate tools and set the options for these tools. Extra tool buttons will be added to the GUI for easy access to the selected tools. A list of tools supported by default is provided below. Other tools or vendors are easily added through the Tcl interface.